Computers are widely used both in our personal life and in our work. The heart of the computer is the central processing unit (CPU), which performs all the numerical calculation needed for today's ever demanding operation. In order to increase the calculation speed of the CPU, and, thus the speed of the computer, the voltage required to power the CPU is becoming lower and lower. At the same time, the current that the CPU draws is becoming higher and higher. For example, the next generation CPU will require supply voltage of less than 1V and current of more than 100 A. The current view is that the required CPU supply voltage is from 0.8V to 1.6V for the next generation CPU.
For the CPU in a high-end server, the type of computer used to direct our Internet traffic and data transfer, the CPU's current requirement is even larger. The current for a server CPU could be up to 500 A.
As an example, in North America, power for a personal computer is typically drawn from a 120V AC wall outlet. This AC voltage is converted into a 12V DC voltage by an AC-to-DC converter. The 12V DC is distributed to a motherboard where the CPU is located. This 12V DC voltage cannot power the CPU directly. A DC-DC converter (often referred to as a voltage regulator module or VRM) is used to convert the 12V DC into the lower voltage required by the CPU. This power system architecture is currently preferred from a performance and cost point of view.
Another requirement of CPU powering is fast dynamic response. During a time when little calculation is required, the CPU will draw very low current. For the time when a lot of calculation is required, the CPU will draw large current. The transition between the low current and large current is very fast. The current change rate can be as high as 10,000 A per microsecond. Therefore, the converter should have very fast dynamic response to meet this requirement.
If the response speed of the converter is not fast enough, the voltage across the CPU will have significant overshoot during the transition from large CPU current to low CPU current because an inductor is typically used in the converter. This voltage overshoot could cause damage to the CPU. Similarly, the voltage across the CPU will have significant undershoot during the transition from low CPU current to large CPU current. If the voltage is too low, the CPU may not operate properly.
In addition, the power loss for the converter should also be small in order to reduce the temperature rise of the semiconductors used to implement the converter.
Referring to FIG. 1, a Buck converter is typically used to convert incoming 12V into low output voltage such as 1.5V.
The output voltage of a Buck converter is calculated as:Vout=D*Vin
Where Vout is the output voltage and Vin is the input voltage. D is the duty cycle and is defined as:D=Ton/Ts
Where Ton is the time period during which the top switch Q1 is conducting, and Ts is the switching period of Q1.
In order to achieve Vin=12V to Vout=0.8V conversion, the required duty cycle for Buck converter is D=0.8/12=7%. It is noted that a small duty cycle such as 7% is not optimal for the design and operation of a Buck converter when the switching time of the MOSFET (“metal-oxide semiconductor field-effect transistor”) is considered. For example, for a typical MOSFET, the turn on time is around 50 ns and the turn off time is around 100 ns. This means that the MOSFET will be conducting for at least 150 ns regardless of the control signal. If we assume the switching frequency is 300 KHz, the switching period is 3.33 μs. The switching time of 150 ns is equivalent to 150 ns/3.33 μs=4.5%. This means that we only have control of about 2.5% (7%-4.5%) of conducting time of the MOSFET. Considering the delay time of the controller, it is very difficult to design an actual implementation. The compromise is to reduce the switching frequency to a lower level, such as 200 KHz. However, lower switching frequency will also lower the dynamic response, which is a very important performance measurement for DC-DC converters.
In addition, operating at a very small duty cycle has another detrimental impact to the dynamic response. During the transition from low CPU current to high CPU current, the inductor current should be ramped up. This can be done by increasing the duty cycle from 7% (take the above example) to 100% (maximum). The duty cycle has 93% change, which is very beneficial to handle this transition. However, during the transition from high CPU current to low CPU current, the inductor current should be ramped down. The only way to achieve this is to reduce the duty cycle. Nevertheless, the duty cycle can only be reduced from 7% to 0%. The duty cycle has only 7% change, which results in poor dynamic response.
To improve the dynamic response, it is desirable to select higher switching frequency for the converter. It is also desirable for the converter to operate at around 50% duty cycle.
Referring to FIG. 2, in order to improve the dynamic response an interleaved Buck converter can be used, such as a four-phase interleaved Buck converter. By interleaving, the equivalent ripple frequency is 4 times the switching frequency of each phase. For example, if the switching frequency of each Buck converter is 200 KHz, the equivalent switching frequency for four-phase interleaved Buck converter will be 800 KHz. Another benefit of interleaving is that the ripple current through the output capacitor and input capacitor is also significantly reduced. However, each Buck converter still operates at very small duty cycle, which is not desirable.